DocumentCode
2124251
Title
A genetic algorithm for the Steiner Problem in a graph
Author
Esbensen, Henrik ; Mazumder, Pinaki
Author_Institution
Dept. of Comput. Sci., Aarhus Univ., Denmark
fYear
1994
fDate
28 Feb-3 Mar 1994
Firstpage
402
Lastpage
406
Abstract
A genetic algorithm (GA) for the Steiner Problem in a graph (SPG) is presented, and its application to global routing of VLSI layouts discussed. In this context the GA´s capability to provide several distinct high-quality solutions to a given problem is very advantageous. The performance of the algorithm is compared to that of two heuristics from the literature. The GA is clearly superior in terms of result quality while also being competitive with respect to runtime
Keywords
VLSI; circuit layout CAD; genetic algorithms; graph theory; network routing; Steiner Problem; VLSI layouts; genetic algorithm; global routing; graph; heuristics; result quality; runtime; Application software; Channel capacity; Computer science; Costs; Genetic algorithms; Pins; Routing; Runtime; Terminology; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.
Conference_Location
Paris
Print_ISBN
0-8186-5410-4
Type
conf
DOI
10.1109/EDTC.1994.326845
Filename
326845
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