Title :
A generalized signal transition graph model for specification of complex interfaces
Author :
Vanbekbergen, P. ; Ykman-Couvreur, Chantal ; Lin, Bill ; Man, Hugo De
Author_Institution :
IMEC, Leuven, Belgium
fDate :
28 Feb-3 Mar 1994
Abstract :
This paper introduces a new Generalized Signal Transition Graph model for specifying complex mixed asynchronous/synchronous circuits, as found in system-level interfaces. The goal has been to develop extensions that make it possible to model mixed asynchronous/synchronous and arbitration behavior. A number of key extensions have been developed that makes the model much more widely applicable to industrial designs. The extensions include Boolean guards, the introduction of level semantics that make it possible to describe “events” in terms of both signal transitions as well as “signal levels”, and the semantic extensions for describing don´t care and undefined behavior. The latter extensions make it possible to model synchronous finite state machines using an asynchronous model, hence permitting the specification of mixed asynchronous/synchronous behavior. The proposed Generalized Signal Transition Graph Model is free from the restrictions of the previous models such as liveness, safeness, and free-choice requirements, and permits general Petri-net structures that may include multiple tokens in a place as long as the resulting state graph is bounded and has a consistent state assignment. A key aspect of the generalizations is that all the extensions are defined at the state graph level
Keywords :
Petri nets; finite state machines; protocols; sequential circuits; state assignment; system buses; Boolean guards; I2C-bus interface; Petri-net structures; bus interface protocol; complex interfaces; don´t care behavior; finite state machines; generalized signal transition graph model; level semantics; mixed asynchronous/synchronous circuits; multiple tokens; state assignment; state graph level; system-level interfaces; Automatic control; Circuit synthesis; Clocks; Control system synthesis; Decision making; Design automation; Laboratories; Petri nets; Protocols; Robustness;
Conference_Titel :
European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-5410-4
DOI :
10.1109/EDTC.1994.326848