DocumentCode :
2124682
Title :
A new BIST approach for delay fault testing
Author :
Vuksic, Anton ; Fuchs, Karl
Author_Institution :
Siemens AG, Munich, Germany
fYear :
1994
fDate :
28 Feb-3 Mar 1994
Firstpage :
284
Lastpage :
288
Abstract :
A new built-in self testing (BIST) method for the detection of delay faults is proposed. It is shown that all possible pattern pairs can be generated with a MISR using all input combinations. In order to reduce the test pattern set, deterministic delay test generation is used and a minimal set of input vectors is derived via clique covering. Experimental results show that by just using the all-0 and all-1 input vectors, the non-robust path delay fault coverage ranges from 85% to 100%
Keywords :
built-in self test; delays; integrated circuit testing; logic testing; BILBO implementation; BIST; MISR; all-0 input vectors; all-1 input vectors; built-in self testing method; clique covering; delay fault testing; deterministic delay test generation; minimal input vector set; nonrobust path delay fault coverage; pattern pair generation; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Propagation delay; Robustness; Test pattern generators; Vectors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-5410-4
Type :
conf
DOI :
10.1109/EDTC.1994.326863
Filename :
326863
Link To Document :
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