Self testable boards with standard IEEE 1149.5 module test and maintenance (MTM) bus interface

Author

Haberl, O.F. ; Kropf, Thomas

Author_Institution

Inst. of Comput. Design & Fault Tolerance, Karlsruhe Univ., Germany

fYear

1994

fDate

28 Feb-3 Mar 1994

Firstpage

220

Lastpage

225

Abstract

In this paper we present the PMSC (Programmable Module Selftest Controller) chip, which realizes an intelligent module test and maintenance (MTM) bus interface for boards as specified in the IEEE 1149.5 standard. Using the standardized “Reset Module with SBIT” command the PMSC chip performs a complete self test of the whole board, which includes the test of all interconnects and all chips. We support chips with a self test capability as well as chips without self test since the PMSC chip allows on-line test pattern generation and test response evaluation

Keywords

automatic testing; boundary scan testing; built-in self test; integrated circuit testing; microprocessor chips; peripheral interfaces; printed circuit accessories; printed circuit testing; printed circuits; standards; EPROM; IEEE 1149.5 standard; PCB testing; Programmable Module Selftest Controller; Reset Module; SBIT; boundary scan architecture; intelligent module test and maintenance bus interface; interconnects; module test and maintenance bus interface; online test pattern generation; self testable boards; test response evaluation; Automatic testing; Circuit testing; Computational Intelligence Society; Computer interfaces; Fault tolerance; Integrated circuit interconnections; Integrated circuit testing; Printed circuits; Registers; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.

Conference_Location

Paris

Print_ISBN

0-8186-5410-4

Type

conf

DOI

10.1109/EDTC.1994.326874

Filename

326874