Lateral design of InP/InGaAs DHBTs for 40 GBIT/s ICs

Author

Blayac, S. ; Riet, M. ; Benchimol, J.L. ; Berdaguer, P. ; Kauffman, N. ; Godin, J. ; Scavennec, A.

Author_Institution

Groupe d´´Interet Econ., France Telecom R&D, Marcoussis, France

fYear

2000

fDate

2000

Firstpage

481

Lastpage

484

Abstract

InP-based HBTs are now available exhibiting cut-off frequency well over 100 GHz even at 1 mA. In this paper, a 40 Gbit/s IC-oriented InP/InGaAs DHBT technology is presented with maximum Ft of 170 GHz and Fmax over 210 GHz with BV_ce0>9 V, specific features of this technology have been developed to increase the design flexibility: high current gain and frequency performances are kept over a large range of collector currents (from 1 mA to 100 mA) and for various dimensions, this is achieved through size-specific lateral transistor design optimization, these features are required for high-performance 40 Gbit/s ICs designed for optical transmission systems, in which careful transistor optimization has to be performed according to its function in the circuit

Keywords

III-V semiconductors; gallium arsenide; heterojunction bipolar transistors; indium compounds; power bipolar transistors; power integrated circuits; 1 to 100 mA; 170 GHz; 210 GHz; 9 V; InP-InGaAs; InP/InGaAs DHBTs; cut-off frequency; design flexibility; high current gain; size-specific lateral transistor design optimization; Circuits; Cutoff frequency; Design optimization; Double heterojunction bipolar transistors; Fabrication; Indium gallium arsenide; Indium phosphide; Performance gain; Research and development; Telecommunications;

fLanguage

English

Publisher

ieee

Conference_Titel

Indium Phosphide and Related Materials, 2000. Conference Proceedings. 2000 International Conference on

Conference_Location

Williamsburg, VA

ISSN

1092-8669

Print_ISBN

0-7803-6320-5

Type

conf

DOI

10.1109/ICIPRM.2000.850338

Filename

850338