A functional approach to delay faults test generation for sequential circuits

Author

Fummi, F. ; Sciuto, D. ; Serra, M.

Author_Institution

Dipartimento di Elettronica, Politecnico di Milano, Italy

fYear

1994

fDate

28 Feb-3 Mar 1994

Firstpage

51

Lastpage

57

Abstract

In this paper we present an analysis of the coverage of delay faults in sequential circuits by a functional test pattern generator. Relationships are investigated between a functional fault model and delay faults, with correlations to the stuck-at fault coverage. Undetected faults are identified and an algorithm to improve the delay fault coverage is proposed. The final approach generates a functional test for sequential circuits with optimization and reaches complete coverage of detectable delay faults with short tests

Keywords

delays; logic testing; sequential circuits; delay fault coverage; delay faults test generation; functional fault model; functional test pattern generator; optimization; sequential circuits; stuck-at fault coverage; undetected faults; Circuit faults; Circuit testing; Delay; Electrical fault detection; Fault detection; Fault diagnosis; Pattern analysis; Sequential analysis; Sequential circuits; Test pattern generators;

fLanguage

English

Publisher

ieee

Conference_Titel

European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.

Conference_Location

Paris

Print_ISBN

0-8186-5410-4

Type

conf

DOI

10.1109/EDTC.1994.326899

Filename

326899