Title :
Taking advantage of ASICs to improve dependability with very low overheads [PLC]
Author :
Michel, T. ; Leveugle, R. ; Saucier, G. ; Doucet, R. ; Chapier, P.
Author_Institution :
INPG/CSI, Grenoble, France
fDate :
28 Feb-3 Mar 1994
Abstract :
On-line test mechanisms have been designed for the CPU of a programmable logic controller. Specific devices integrated in an ASIC processor perform control flow checking during both application and system program executions. A prototype has been implemented, demonstrating the very low overhead of the approach. Results of fault injections have then proved the dependability increase at system level
Keywords :
application specific integrated circuits; computer testing; integrated circuit testing; logic testing; programmable controllers; programmed control; ASIC processor; CPU architecture; control flow checking; error detection mechanisms; fault detection; fault injections; online test mechanisms; programmable logic controller; signature monitoring schemes; system level dependability improvement; very low overhead; Application software; Application specific integrated circuits; Computer applications; Computer architecture; Condition monitoring; Error correction; Fault detection; Processor scheduling; Programmable control; Sampling methods;
Conference_Titel :
European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-5410-4
DOI :
10.1109/EDTC.1994.326905
