Title :
Si-capping thicknesses impacting compressive strained MOSFETs with temperature effect
Author :
Mu-Chun Wang ; Ssu-Hao Peng ; Shea-Jue Wang ; Hsin-Chia Yang ; Wen-Shiang Liao ; Chao-Wang Li ; Chuan-Hsi Liu
Author_Institution :
Dept. of Electron. Eng., Minghsin Univ. of Sci. & Technol., Hsinchu, Taiwan
Abstract :
Increasing the electrical performance of the MOSFETs with contact etch stop layer (CESL) and SiGe channel technologies in strain engineering is indeed approached. Using silicon capping layer performs the benefits on the smoothness of channel surface and the prevention of germanium penetration from SiGe layer. In this study, the deposited capping layer thicknesses with SiGe channel of (110) substrate wafer were 1.5 and 3.0 nm on the poly gate. The interesting device parameters including drive current, transconductance, threshold voltage (VT) and subthreshold swing (S.S.) with temperature effect are systematically analyzed.
Keywords :
Ge-Si alloys; MOSFET; elemental semiconductors; etching; silicon; (110) substrate wafer; CESL; Si; Si-capping thickness; SiGe; SiGe channel technology; capping layer thickness; compressive strained MOSFET; contact etch stop layer; drive current; electrical performance; germanium penetration; silicon capping layer; size 1.5 nm; size 3.0 nm; strain engineering; subthreshold swing; temperature effect; threshold voltage; transconductance; MOSFET; MOSFET circuits; Performance evaluation; Silicon; Silicon germanium; Strain; Temperature measurement; contact etching stop layer (CESL); mobility; silicon capping layer; strained silicon;
Conference_Titel :
Next-Generation Electronics (ISNE), 2013 IEEE International Symposium on
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-4673-3036-7
DOI :
10.1109/ISNE.2013.6512367
