DocumentCode
2126189
Title
Architectural Breakdown of End-to-End Latency in a TCP/IP Network
Author
Larsen, Steen ; Sarangam, Parthasarathy ; Huggahalli, Ram
Author_Institution
Intel Corp., Santa Clara
fYear
2007
fDate
24-27 Oct. 2007
Firstpage
195
Lastpage
202
Abstract
Adoption of the 10 GbE Ethernet standard has been impeded by two important performance-oriented considerations: 1) processing requirements of common protocol stacks and 2) end-to-end latency. The overheads of typical software based protocol stacks on CPU utilization and throughput have been well evaluated in several studies. In this paper, we focus on end-to-end latency and present a detailed characterization across typical server system hardware and software stack components. We demonstrate that application level end-to-end latency with a 10 GbE connection can be as low as 10 microseconds for a single isolated request. The paper analyzes the components of the latency and discusses possible significant variations to the components under realistic conditions. We note that methods that are used to optimize throughput can often be responsible for the perception that Ethernet based latencies can be very high. Methods to pursue reducing the minimum latency and controlling the variations are presented.
Keywords
local area networks; network servers; transport protocols; 10 GbE Ethernet standard; CPU throughput; CPU utilization; TCP/IP network; architectural breakdown; end-to-end latency; server system hardware; software based protocol stacks; software stack components; Delay; Electric breakdown; Ethernet networks; Hardware; IP networks; Impedance; Protocols; Software systems; TCPIP; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Architecture and High Performance Computing, 2007. SBAC-PAD 2007. 19th International Symposium on
Conference_Location
Rio Grande do Sul
ISSN
1550-6533
Print_ISBN
978-0-7695-3014-7
Type
conf
DOI
10.1109/SBAC-PAD.2007.33
Filename
4384058
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