DocumentCode :
2126337
Title :
DTA-C: A Decoupled multi-Threaded Architecture for CMP Systems
Author :
Giorgi, Roberto ; Popovic, Zdravko ; Puzovic, Nikola
Author_Institution :
Univ. of Siena, Siena
fYear :
2007
fDate :
24-27 Oct. 2007
Firstpage :
263
Lastpage :
270
Abstract :
One way to exploit Thread Level Parallelism (TLP) is to use architectures that implement novel multithreaded execution models, like Scheduled Data- Flow (SDF). This latter model promises an elegant decoupled and non-blocking execution of threads. Here we extend that model in order to be used in future scalable CMP systems where wire delay imposes to partition the design. In this paper we describe our approach and experiment with different distributed schedulers, different number of clusters and processors per cluster to show good scalability of our architecture. We describe our approach and present initial results on system scalability and performance. We suggest design choices to improve the scalability of the basic design.
Keywords :
multi-threading; software architecture; distributed schedulers; multithreaded architecture decoupling; multithreaded execution models; scheduled data-flow; thread level parallelism; Computer architecture; Data engineering; High performance computing; Logic; Parallel processing; Pipelines; Processor scheduling; Scalability; Wire; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Architecture and High Performance Computing, 2007. SBAC-PAD 2007. 19th International Symposium on
Conference_Location :
Rio Grande do Sul
ISSN :
1550-6533
Print_ISBN :
978-0-7695-3014-7
Type :
conf
DOI :
10.1109/SBAC-PAD.2007.27
Filename :
4384066
Link To Document :
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