• DocumentCode
    2126539
  • Title

    VLSI implementation of an adaptive equalizer for ATSC digital TV receivers

  • Author

    Sung, Wonyong ; Ahn, Youngho ; Hwang, Eunjoo

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Seoul Nat. Univ., South Korea
  • fYear
    2003
  • fDate
    27-29 Aug. 2003
  • Firstpage
    12
  • Lastpage
    17
  • Abstract
    An adaptive equalizer for ATSC standard HDTV receivers is developed and implemented in VLSI. This equalizer is based on the G-pseudo algorithm that combines the advantages of decision directed and blind algorithms. It also conducts ghost cancelling for the reception of NTSC analog TV signals. A programmable error calculation unit is employed for a flexible implementation of several equalization algorithms. The filter coefficients have a quite long internal word-length for satisfactory operation in the blind adaptation mode, but only parts of them are used for output calculation to reduce the hardware complexity. The performance of the system for seven GA (Grand Alliance) reference channels is evaluated according to the adaptation algorithms, the number of delays for the adaptation, and the word-length of the filter coefficients. The chip area and power consumption according to the time multiplexing ratio is estimated.
  • Keywords
    VLSI; adaptive equalisers; adaptive filters; blind equalisers; delays; digital television; high definition television; integrated circuit design; power consumption; television receivers; time division multiplexing; ATSC digital TV receivers; G-pseudo algorithm; GA reference channels; HDTV receivers; NTSC analog TV signal reception; VLSI; adaptive equalizer; adaptive filter algorithms; blind algorithms; chip area; decision directed algorithms; delays; filter coefficient word-length; ghost cancelling; hardware complexity; power consumption; programmable error calculation unit; time multiplexing ratio; Adaptive equalizers; Delay; Digital TV; Energy consumption; Filters; HDTV; Hardware; Standards development; TV receivers; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing Systems, 2003. SIPS 2003. IEEE Workshop on
  • ISSN
    1520-6130
  • Print_ISBN
    0-7803-7795-8
  • Type

    conf

  • DOI
    10.1109/SIPS.2003.1235636
  • Filename
    1235636