DocumentCode :
2126816
Title :
25 /spl Aring/ gate oxide without boron penetration for 0.25 and 0.3-/spl mu/m PMOSFETs
Author :
Liu, C.T. ; Ma, Y. ; Cheung, K.P. ; Chang, C.P. ; Fritzinger, L. ; Becerro, J. ; Luftman, H. ; Vaidya, H.M. ; Colonell, J.I. ; Kamgar, A. ; Minor, J.F. ; Murray, R.G. ; Lai, W.Y.C. ; Pai, C.S. ; Hillenius, S.J.
Author_Institution :
AT&T Bell Labs., Murray Hill, NJ, USA
fYear :
1996
fDate :
11-13 June 1996
Firstpage :
18
Lastpage :
19
Abstract :
Very thin gate oxides are necessary for small CMOS transistors. However, one major challenge is boron penetration through the thin gate oxides in surface-channel PMOSFETs. Other difficulties include low breakdown voltage, thickness variation control, and device reliabilities. In this work, nitrogen was implanted in the substrate before growing thin gate oxides. 0.25-/spl mu/m and 0.30-/spl mu/m surface-channel PMOSFETs were then fabricated. New results on oxide properties and device characteristics are observed.
Keywords :
MOSFET; boron; ion implantation; nitrogen; oxidation; 0.25 micron; 0.30 micron; CMOS transistor; Si:N-SiO/sub 2/:B; boron penetration; breakdown voltage; fabrication; gate oxide; nitrogen implantation; reliability; surface-channel PMOSFET; thickness control; Boron; MOSFETs; Nitrogen; Thickness control; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 1996. Digest of Technical Papers. 1996 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-3342-X
Type :
conf
DOI :
10.1109/VLSIT.1996.507777
Filename :
507777
Link To Document :
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