AV codec prototype system using a low-power SPXK5SC DSP core

The paper proposes a method for rapidly verifying and evaluating overall performance on real-time workloads of system LSIs integrated with SPXK5SC DSP cores. The SPXK5SC have been developed as a DSP core well-suited to system LSIs. Despite the fact that it is very important to evaluate the overall performance of target LSIs on real workloads before actual LSI fabrication, software simulators are too slow to deal with real workloads and full hardware prototyping is unable to respond well to design improvements. Therefore, we have developed a hardware emulation approach to be used on system LSIs integrated with an SPXK5SC DSP core in order to evaluate the overall performance of an audio/video codec on a target system. Our emulation system using a DSP core TEG (test element group), which has a bus interface, and an FPGA should be suitable for overall system evaluation on real-time workloads as well as architectural investigation. We discuss the use of the emulation system in evaluating performance during AV codec execution. An architecture design based on our emulation system is also described.