Fully self-aligned 6F/sup 2/ cell technology for low cost 1Gb DRAM

A fully self-aligned BOC (Bit-line Over Capacitor) cell for 1 Gb DRAM is proposed. By a 6F/sup 2/ open bit-line cell layout and a dual isolation structure, active region was designed with a simple line-and-space configuration offering a large lithography process margin. A self-aligned cylindrical stacked capacitor and a bit line plug fabrication process were developed in order to obtain sufficient storage capacity and a large alignment tolerance. A test structure was made using the 0.4-/spl mu/m design rule and cell characteristics were investigated.