Title :
New erase scheme suitable for low power flash memory application
Author :
Haddad, S. ; Vei-Han Chan ; Hao Fang ; Yuan Tang ; Ramsbey, M. ; Wang, A. ; Yu Sun ; Chi Chang ; Jih Lien
Author_Institution :
Non-Volatile Technol. Dev., Adv. Micro Devices Inc., Sunnyvale, CA, USA
Abstract :
A novel erasing method utilizing avalanche hot-electron injection for low power flash memory applications is proposed and investigated. In this new bias scheme, a single internally pumped voltage (<10 V) uniformly charges up an array of cells in 0.5 sec at a current level less than 1 nA per cell. The array exhibited minimal degradation after cycling to beyond 100 K. In addition to providing superior flash reliability, this new bias scheme is suitable for low power application.
Keywords :
EPROM; avalanche breakdown; hot carriers; integrated circuit reliability; integrated memory circuits; 10 V; 100 K; avalanche hot-electron injection; bias scheme; erase scheme; low power flash memory; reliability; thermal cycling; Degradation; Flash memory; Secondary generated hot electron injection; Voltage;
Conference_Titel :
VLSI Technology, 1996. Digest of Technical Papers. 1996 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-3342-X
DOI :
10.1109/VLSIT.1996.507790
