Optimal fixed-point VLSI structure of a floating-point based digital filter design

In this paper, we develop a knowledge-based CAD tool to assist the system IC designers with the fixed-point implementation of a prescribed digital filter. The tool will analyze the finite-precision behavior of three possible fixed-point implementations of a given floating-point based filter design. Based on the analytical results, the tool can suggest most suitable filter structure, wordlength assignment, and scaling operations to realize the filter. It will also estimate the hardware cost of the resulting VLSI architectures. Therefore, the designer can simply pick up the most cost-efficient VLSI implementation of the target filter without going through tedious fixed-point analysis