Dynamic wordlength variation for low-power 3D graphics texture mapping

The texture mapping stage, which facilitates high quality 3D graphics applications, consumes a significant amount of power for real-time processing because of its high computation and memory access requirements. An investigation into techniques that reduce its power consumption and provide scalable power-quality trade-offs is needed for its popular use in handheld devices such as PDAs. Two techniques and an associated architecture are presented, which achieve variable power savings by exploiting the perceptual tolerance of the end-user. These techniques leverage the lower weights of certain texture pixels and the correlation present between the neighboring texture pixels for supporting dynamic wordlength variation. A methodology is developed for fast power and error estimation based on realistic 3D graphics workloads. Power savings of about 21% at a slight quality degradation have been demonstrated and scalable power-quality trade-offs of more than 50% can also be achieved. The techniques can also be used for other stages of 3D graphics and image filtering.