• DocumentCode
    2127600
  • Title

    Ultra-thin, highly uniform thin film SOI MOSFET with low series resistance using pattern-constrained epitaxy (PACE)

  • Author

    Wong, H.-S. ; Chan, K. ; Lee, Y. ; Roper, P. ; Taur, Y.

  • Author_Institution
    IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
  • fYear
    1996
  • fDate
    11-13 June 1996
  • Firstpage
    94
  • Lastpage
    95
  • Abstract
    We report a novel fabrication process for a self-aligned, ultrathin, highly uniform thin film SOI MOSFET with low series resistance. SOI films as thin as 11 nm with 5% uniformity across the wafer was achieved. Self-aligned, ultra-thin SOI n-MOSFETs with 8 nm-50 nm undoped channel were fabricated. Excellent device characteristics (L/sub eff/=0.2 /spl mu/m, g/sub m/=242 mS/mm, R/sub s/d/=333 /spl Omega/-/spl mu/m, A/sub v/(g/sub m//g/sub d/)=43) were obtained.
  • Keywords
    MOSFET; epitaxial growth; semiconductor technology; silicon-on-insulator; thin film transistors; fabrication; pattern-constrained epitaxy; self-aligned ultra-thin device; series resistance; thin film SOI MOSFET; Fabrication; MOSFET circuits; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1996. Digest of Technical Papers. 1996 Symposium on
  • Conference_Location
    Honolulu, HI, USA
  • Print_ISBN
    0-7803-3342-X
  • Type

    conf

  • DOI
    10.1109/VLSIT.1996.507806
  • Filename
    507806