DocumentCode
2127948
Title
Data retention times in SOI-DRAMs
Author
Hyoung-Sub Kim ; Dong-Uk Choi ; Sang-Hoon Lee ; Seung-Kuk Lee ; Jae-Kwan Park ; Ki-Nam Kim ; Jong-Woo Park
Author_Institution
Technol. Dev., Samsung Electron. Co., Kyungki-Do, South Korea
fYear
1996
fDate
11-13 June 1996
Firstpage
126
Lastpage
127
Abstract
Refresh characteristics in SOI-DRAMs are discussed. Compared with bulk-Si DRAMs, excellent static refresh characteristics in SOI-DRAMs were obtained, owing to the inherently reduced junction area. Inferior dynamic refresh characteristics in SOI-DRAMs were measured due to the floating body, but this can be overcome by a pipe channel doping structure.
Keywords
DRAM chips; MOS memory circuits; VLSI; characteristics measurement; integrated circuit measurement; silicon-on-insulator; 16 Mbit; SOI-DRAMs; data retention times; dynamic refresh characteristics; floating body; junction area; pipe channel doping structure; static refresh characteristics; Doping;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 1996. Digest of Technical Papers. 1996 Symposium on
Conference_Location
Honolulu, HI, USA
Print_ISBN
0-7803-3342-X
Type
conf
DOI
10.1109/VLSIT.1996.507819
Filename
507819
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