DocumentCode
2128022
Title
Energy aware distributed arithmetic DCT architectures
Author
Darwish, T. ; Bayoumi, M.
Author_Institution
Center for Adv. Comput. Studies, Louisiana Univ., Lafayette, LA, USA
fYear
2003
fDate
27-29 Aug. 2003
Firstpage
351
Lastpage
356
Abstract
An energy aware DCT (discrete cosine transform) architecture based on the distributed arithmetic concept is proposed. Architectures based on the distributed arithmetic concept are inherently low power as they are multiplication free algorithms. One characteristic of the DCT is that signal energies are concentrated in only a few coefficients (less than 25%) upon transformation, with the rest (or 75%) of the coefficients being insignificant and negligible. One can skip the computation of these terms without seriously affecting the output signal quality. Exploiting this idea, we propose an energy aware DCT architecture which adaptively trades off image quality with power dissipation. Our simulation results show that the new proposed architecture achieves 60% in power savings with a small degradation in signal quality.
Keywords
discrete cosine transforms; distributed arithmetic; image processing; integrated circuit design; logic design; power consumption; distributed arithmetic DCT architecture; energy aware DCT architecture; energy aware system design; image quality; multiplication free algorithms; output signal quality; Arithmetic; Computer architecture; Discrete Fourier transforms; Discrete cosine transforms; Karhunen-Loeve transforms; Multimedia systems; Power dissipation; Power system reliability; Transform coding; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Systems, 2003. SIPS 2003. IEEE Workshop on
ISSN
1520-6130
Print_ISBN
0-7803-7795-8
Type
conf
DOI
10.1109/SIPS.2003.1235695
Filename
1235695
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