Title :
Computationally fast lattice bilinear digital ladder filters with comparison to circulator WDFs
Author :
Harnefors, Lennart ; Holmberg, Johnny ; Sollander, Magnus ; Signell, Svante
Author_Institution :
Dept. of Electr. Eng., Malardalen Univ., Vasteras, Sweden
fDate :
31 May-3 Jun 1998
Abstract :
This paper considers a modified variant of the lossless digital integrator lattice filter structure, which is called a lattice bilinear digital ladder filter (BDLF). It is shown that the structure easily can be modified so that the critical loop reduces from two multipliers to one. This has the potential of significantly improving the computational speed when the filter is implemented directly in hardware. Two test filters of the modified BDLF structure are compared to three-port circulator lattice wave digital filters (WDF), which also have critical loops of only one multiplier. It is shown that for the test filters, the BDLF realizations are similar to the WDF realizations regarding multiplier wordlength requirements, while they are superior regarding quantization noise and structural complexity
Keywords :
circuit noise; digital arithmetic; digital filters; ladder filters; lattice filters; sensitivity analysis; circulator WDFs; computationally fast filters; critical loops; lattice bilinear digital ladder filters; multiplier; quantization noise; structural complexity; wave digital filters; Delay; Digital filters; Electronic mail; Flow graphs; Hardware; Lattices; Noise level; Quantization; Signal design; Testing;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.694504