• DocumentCode
    2128279
  • Title

    Two-stage drain leakage degradation in sub-micron MOSFET technology

  • Author

    Frommer, A. ; Pinto, M.R. ; Bude, J.D.

  • Author_Institution
    AT&T Bell Labs., Murray Hill, NJ, USA
  • fYear
    1996
  • fDate
    11-13 June 1996
  • Firstpage
    164
  • Lastpage
    165
  • Abstract
    Gate Induced Drain Leakage (GIDL) current is increasingly important in thin-oxide MOSFETs. Results are reported here on the degradation of the drain leakage current, I/sub DL/, in scaled nMOSFETs under hot carrier stress. A two-stage degradation process is observed where /spl Delta/I/sub DL/ increases with time initially at a rate /spl prop/t/sup 0.5/ followed by a second regime with rate /spl prop/t/sup 3/. The initial phase is driven by interface traps N/sub it/ which induce trap-assisted tunneling (TAT), while the second phase is caused by trapped oxide charge which eventually leads to a catastrophic increase in GIDL through band-to-band tunneling (BET). The superlinear BBT-induced degradation rate implies a potentially severe reliability constraint for future thin-oxide devices.
  • Keywords
    MOSFET; hot carriers; leakage currents; tunnelling; band-to-band tunneling; gate induced drain leakage current; hot carrier stress; interface traps; reliability; sub-micron MOSFET technology; thin-oxide device; trap-assisted tunneling; trapped oxide charge; two-stage degradation; Degradation; Hot carriers; Lead compounds; Leakage current; MOSFET circuits; Stress; Tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1996. Digest of Technical Papers. 1996 Symposium on
  • Conference_Location
    Honolulu, HI, USA
  • Print_ISBN
    0-7803-3342-X
  • Type

    conf

  • DOI
    10.1109/VLSIT.1996.507834
  • Filename
    507834