• DocumentCode
    2128779
  • Title

    Simulation of LDPC convolutional decoders with CPU and GPU

  • Author

    Chan, Chi H. ; Lau, Francis C M

  • Author_Institution
    Dept. of Electron. & Inf. Eng., Hong Kong Polytech. Univ., Hong Kong, China
  • fYear
    2012
  • fDate
    21-23 April 2012
  • Firstpage
    2854
  • Lastpage
    2857
  • Abstract
    In this paper, the Sum Product Algorithm (SPA) and the Min-Sum Algorithm (MSA) are used for decoding low-density parity-check convolutional codes (LDPC-CCs). The two algorithms have been implemented and run on three different computing environments. The first environment is a single-threading Central Processing Unit (CPU); the second one is the multi-threading CPU based on OpenMP (Open Multi-Processing); and the third one is the multi-threading Graphics Processing Unit (GPU). The error performance of the LDPC-CCs and the simulation time taken under the three specific computing environments and the two decoding algorithms are evaluated and compared. It is found that the different computing environments produce very similar error results. It is also concluded that using the GPU computing platform can reduce the simulation time substantially.
  • Keywords
    codecs; convolutional codes; parity check codes; GPU; LDPC convolutional decoders; OpenMP; convolutional codes; low density parity check codes; min-sum algorithm; multi-threading CPU; multi-threading graphics processing unit; open multi-processing; single-threading central processing unit; sum product algorithm; Convolutional codes; Decoding; Graphics processing unit; Iterative decoding; Message systems; CPU; GPU; LDPC convolutional code; OpenMP; error-correction code;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Consumer Electronics, Communications and Networks (CECNet), 2012 2nd International Conference on
  • Conference_Location
    Yichang
  • Print_ISBN
    978-1-4577-1414-6
  • Type

    conf

  • DOI
    10.1109/CECNet.2012.6202062
  • Filename
    6202062