DocumentCode :
2130370
Title :
Precise control flow reconstruction using Boolean logic
Author :
Reinbacher, Thomas ; Brauer, Jörg
Author_Institution :
Embedded Comput. Syst. Group, Vienna Univ. of Technol., Vienna, Austria
fYear :
2011
fDate :
9-14 Oct. 2011
Firstpage :
117
Lastpage :
126
Abstract :
This paper presents a SAT-based method for control flow graph reconstruction from executable code. The key idea of the technique is to express the semantics of each basic block in a program using Boolean logic, followed by inferring pre- and postconditions for each block through interleaved forward and backward analysis. In particular, the technique relies on register-wise value-set abstractions, which are subsequently refined using alternating forward and backward analyses. Experimental evidence shows that this approach, despite being sound, recovers the control flow graph precisely for different real-world benchmarks.
Keywords :
Boolean functions; computability; flow graphs; program verification; Boolean logic; SAT based method; control flow graph reconstruction; executable code; precise control flow reconstruction; register wise value set abstractions; Abstract interpretation; SAT solving; binary code; control flow recovery; refinement; static analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Embedded Software (EMSOFT), 2011 Proceedings of the International Conference on
Conference_Location :
Taipei
Print_ISBN :
978-1-4503-0714-7
Type :
conf
Filename :
6064518
Link To Document :
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