DocumentCode
2133241
Title
Analytical Modeling For Prediction of Hot Spot Chip Junction Temperature for Electronics Cooling Applications
Author
Iyengar, Madhusudan ; Schmidt, Roger
Author_Institution
Adv. Thermal Lab., Int. Bus. Machines Corp., Poughkeepsie, NY
fYear
2006
fDate
May 30 2006-June 2 2006
Firstpage
87
Lastpage
95
Abstract
Microprocessor driven escalation of thermal management needs has resulted in significant cooling challenges at several different design levels, including the chip, package, module, board, and the rack, respectively, as well as for data centers in the case of servers. The spatial non-uniformity in the input power at the chip device or junction side, leads to the occurrence of hot spots that often represents a significant component of the total junction-to-ambient thermal resistance. In this paper, an analytical chip junction temperature prediction model is developed using a resistance network approach and techniques from recent literature. The analytical model is numerically validated for air cooling applications. Examples that represent capped (or lidded) air cooling modules as well as those using a directly attached heat sink are presented. The analytical model takes as an input, the chip power map, various dimensional parameters and thermo -physical properties for the chip, the thermal interfaces, and the spreaders, respectively, and a convective boundary condition that describes the heat sink fins, and the output is the spatial temperature distribution at the device/junction side of the chip. The analytical predictions for the total hot spot junction to ambient thermal resistance were within 5% of numerical results for a broad range of design parameters, including thermal interface material and spreader thermal conductivity, respectively, and effective convective heat transfer coefficient. The analytical temperature estimates were found to be conservative for the majority of the cases. The spatial variation at the device side analytical chip temperature also compared well with the data from the more sophisticated numerical computations. Solution times were found to be about 60 seconds or less for typical problems on a conventional PC, which greatly reduces and simplifies the estimation of thermal performance
Keywords
cooling; heat sinks; microprocessor chips; thermal management (packaging); thermal resistance; air cooling; chip junction temperature prediction; convective heat transfer; electronics cooling; heat sink fins; hot spot; spatial temperature distribution; spreading resistance; thermal management; thermal resistance; Analytical models; Electronic packaging thermal management; Electronics cooling; Heat sinks; Microprocessors; Predictive models; Temperature; Thermal conductivity; Thermal management; Thermal resistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Thermal and Thermomechanical Phenomena in Electronics Systems, 2006. ITHERM '06. The Tenth Intersociety Conference on
Conference_Location
San Diego, CA
ISSN
1087-9870
Print_ISBN
0-7803-9524-7
Type
conf
DOI
10.1109/ITHERM.2006.1645326
Filename
1645326
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