Title :
Wireless sensor nodes processor architecture and design
Author :
Kateeb, Ali El ; Ramesh, Aiyappa ; Azzawi, L.
Author_Institution :
Dept. of Electr. & Comput. Eng., Michigan Univ., Dearborn, MI
Abstract :
The sensor networks are intended to support a variety of applications. Providing sensor network with flexible nodes design will make possible to support a variety of applications. A detailed view of soft processor core design and the instructions set for flexible sensor network nodes is presented in this paper. This soft core design can be easily modified and integrated with other components to construct different types of sensor nodes. The soft core is implemented using Xilinx ISE design tools. The core has been tested using cycle accurate timing simulation. The performance of above 10 MIPS can be achieved with the designed soft core.
Keywords :
integrated circuit design; wireless sensor networks; Xilinx ISE design tools; flexible nodes design; instructions set; soft processor core design; wireless sensor nodes processor architecture; wireless sensor nodes processor design; Application software; Arithmetic; Cameras; Clocks; Computer architecture; Counting circuits; Process design; Registers; Surveillance; Wireless sensor networks;
Conference_Titel :
Electrical and Computer Engineering, 2008. CCECE 2008. Canadian Conference on
Conference_Location :
Niagara Falls, ON
Print_ISBN :
978-1-4244-1642-4
Electronic_ISBN :
0840-7789
DOI :
10.1109/CCECE.2008.4564693
