DocumentCode :
2133497
Title :
Using CAE to check stress levels in power circuits
Author :
Crosby, Brian
Author_Institution :
Analog Design Tools, Inc., Menlo Park, CA
fYear :
1987
fDate :
2-6 March 1987
Firstpage :
185
Lastpage :
189
Abstract :
Power circuits must operate within safe limits to assure long-term reliability and prevent catastrophic failure. However, manual calculation of circuit operating conditions is both laborious and often inaccurate, and breadboard tests can be difficult and time consuming. This paper describes new CAE techniques to automatically evaluate the operating conditions of the components in a power circuit by using a stress analysis software tool that works in concert with a SPICE circuit simulator.
Keywords :
Heat sinks; Integrated circuit modeling; Junctions; Power dissipation; Resistors; Stress; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Applied Power Electronics Conference and Exposition, 1987 IEEE
Conference_Location :
San Diego, CA USA
ISSN :
1048-2334
Type :
conf
DOI :
10.1109/APEC.1987.7067148
Filename :
7067148
Link To Document :
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