Title :
A compact real-time SAR processing system using the highly parallel HiPAR-DSP 16
Author :
Friebe, L. ; Kloos, H. ; Wittenburg, J.P. ; Hinrichs, W. ; Lieske, H. ; Klar, C. ; Pirsch, P.
Author_Institution :
Laboratorium fur Informationstechnologie, Hannover Univ., Germany
Abstract :
At the Laboratorium für Informationstechnologie the HiPAR-DSP 16, a parallel digital signal processor (DSP) optimized for image processing algorithms, has been developed. We present a design of a compact multi-DSP board utilizing the HiPAR-DSP 16. Two boards were implemented: an application development board with a PCI interface and a board for SAR processing. With a computational power of up to 15 GOPS this board is suitable for real-time SAR processing, as an estimation for an ωk algorithm (range line length of 4096 samples, PRF of 600) shows. A volume of 160×230×20 mm3 and a power consumption of less than 20 W enables on-board integration. The first version of the board is used for filtering of SAR data to show the capabilities of the system
Keywords :
digital signal processing chips; field programmable gate arrays; parallel architectures; parallel processing; radar imaging; real-time systems; DSP board; FPGA; HiPAR-DSP 16; PCI Interface; SAR image processing; filtering; on-board integration; parallel DSP; programmable digital signal processor; real-time system; Centralized control; Clocks; Digital signal processing; Energy consumption; Filtering; Laboratories; Optical filters; Real time systems; Signal processing algorithms; VLIW;
Conference_Titel :
Geoscience and Remote Sensing Symposium, 2001. IGARSS '01. IEEE 2001 International
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-7031-7
DOI :
10.1109/IGARSS.2001.977984
