DocumentCode
2136989
Title
Phase-locked loop of inverter based on FPGA
Author
Shuhong Li ; Yueqing Zhou
Author_Institution
Sch. of Electr. Eng. & Autom., Tianjin Univ., Tianjin, China
fYear
2012
fDate
16-18 Oct. 2012
Firstpage
1490
Lastpage
1493
Abstract
An induction heating system with a full bridge LLC (a kind of load form) resonant inverter is described in this paper. Subsequently, the output voltage of inverter and capacitance voltage are chosen as control variables of phase-locked loop (PLL). With regard to LLC resonant inverter, there is a phase error of 90 degrees between the two control variables. First of all, a kind of PLL with XOR Phase Detector (XORPD) is proposed. This PLL is realized by embedded function module 74HCT297 of FPGA. Then a novel PLL with Phase-Frequency Detector (PFD) is designed. Compared with the latter, the former can be more completely implemented by FPGA. However, the latter is able to adapt to more complex input signals, which is good for high frequency and high efficiency of induction heating system.
Keywords
field programmable gate arrays; induction heating; invertors; phase detectors; phase locked loops; 74HCT297; FPGA; LLC resonant inverter; XOR phase detector; capacitance voltage; control variables; embedded function module; full bridge LLC; induction heating system; load form; phase error; phase-frequency detector; phase-locked loop; FPGA; LLC resonant inverter; Phase-Frequency Detector (PFD); XOR Phase Detector (XORPD); phase-locked loop (PLL);
fLanguage
English
Publisher
ieee
Conference_Titel
Biomedical Engineering and Informatics (BMEI), 2012 5th International Conference on
Conference_Location
Chongqing
Print_ISBN
978-1-4673-1183-0
Type
conf
DOI
10.1109/BMEI.2012.6513128
Filename
6513128
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