Filtering Cache Pollution by Using Replacement Operation Based on Confidence Estimation

Multi-Core architecture is the development trend of microprocessor architecture, and the “Memory Wall” is the chief obstacle to promote the processor performance. This paper analyzes the key factors affecting performance of memory system in shared L2 cache multi-core on a chip architecture, and believes that cache pollution caused by the speculative execution of memory reference instructions in predictive path may affect the performance of processor seriously. This paper proposes a cache pollution filtration technique based on confidence estimation, called FCPC. FCPC proceeds the dynamic appraisal using the confidence estimation mechanism to condition branch, and adds two tag bits CET (confidence estimation tag) and AHT(accessing hint tag) for each cache data line. According to the appraisal result, the memory accessing instructions in predictive path and their returned data in L2 cache are marked as high or low confidence separately. Then, when cache replacing operations are processed, the pollution data in shared L2 cache can be swept out preferentially according to CET and AHT tag. So, the efficiency of cache space is increased. Simulation result indicates that, in dual-core configuration, the FCPC strategy can promote the IPC performance effectively, ranges from 0.18%-4.86%, 1.91% averagely. Simultaneously, the miss rate of L2 Cache can be reduced, ranges from 0.65%-5.76%, average 2.57%.