DocumentCode
2137667
Title
Signal delay in coupled, distributed RC lines in the presence of temporal proximity
Author
Chandramouli, V. ; Kayssi, A.I. ; Sakallah, K.A.
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
fYear
1997
fDate
15-16 Sep 1997
Firstpage
32
Lastpage
46
Abstract
With improvements in technology, accurate delay modeling of interconnects is becoming increasingly important. Due to decreasing feature sizes, the spacing between the signal lines is also decreasing. Consequently, the switching activities on the neighboring lines can have a significant impact on the delay of the line of interest, and can no longer be ignored. Accurate modeling of this phenomenon, which we call the proximity effect, is the subject of this paper. This is similar to the state-dependency of logic gate delays, where signal delay can be affected by the switching activities on the side inputs of a gate. We describe an efficient and accurate delay computation method using precomputed interconnect moments that treats the coupled lines as uniform, distributed RC lines and does not make any lumped approximations. This allows the proposed delay model to be used in a timing analysis tool operating over both gate and interconnect domains while accounting for state-dependency
Keywords
RC circuits; delays; integrated circuit interconnections; transmission line theory; coupled distributed RC line; interconnect; logic gate; signal delay model; state dependency; switching activity; temporal proximity; Circuit simulation; Couplings; Delay effects; Delay lines; Distributed computing; Integrated circuit interconnections; Logic gates; Proximity effect; Switches; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Research in VLSI, 1997. Proceedings., Seventeenth Conference on
Conference_Location
Ann Arbor, MI
Print_ISBN
0-8186-7913-1
Type
conf
DOI
10.1109/ARVLSI.1997.634844
Filename
634844
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