A 60-GHz variable delay line on CMOS for steerable antennae in wireless communication systems

Author

Ta, Chien M. ; Skafidas, Efstratios ; Evans, Robin J. ; Hoang, Chien D.

Author_Institution

Dept. of Electr. & Electron. Eng., Melbourne Univ., Melbourne, VIC

fYear

2008

fDate

4-7 May 2008

Abstract

A variable delay line (VDL) is designed on a 130-nm CMOS process. Post-layout simulation results show that the VDL has a phase tuning range of 100 degrees at 60 GHz. It exhibits a wideband matching to 50-Ohm terminations from 20 GHz up to exceeding 80 GHz. The group delay variation is less than 4 ps within a bandwidth of 10 GHz. At its maximum phase shift, the VDL introduces a loss of 6 dB. The design features a small footprint of 430 mum times 220 mum and can be easily extended to provide wider phase tuning range.

Keywords

CMOS integrated circuits; MIMIC; delays; millimetre wave antennas; radiocommunication; CMOS process; bandwidth 10 GHz; frequency 60 GHz; loss 6 dB; phase shift; phase tuning range; post-layout simulation; resistance 50 ohm; variable delay line; wideband matching; wireless communication systems; Bandwidth; CMOS process; Circuit synthesis; Delay lines; Millimeter wave communication; Phase shifters; Phased arrays; Varactors; Wideband; Wireless communication; 60 GHz; CMOS; Phase shifter; millimeter-wave; varactor;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Computer Engineering, 2008. CCECE 2008. Canadian Conference on

Conference_Location

Niagara Falls, ON

ISSN

0840-7789

Print_ISBN

978-1-4244-1642-4

Electronic_ISBN

0840-7789

Type

conf

DOI

10.1109/CCECE.2008.4564877

Filename

4564877