DocumentCode :
2138196
Title :
Alternatives for Execution Semantics of IEC61499
Author :
Vyatkin, Valeriy ; Dubinin, Victor ; Veber, Carlo ; Ferrarini, Luca
Author_Institution :
Univ. of Auckland, Auckland
Volume :
2
fYear :
2007
fDate :
23-27 June 2007
Firstpage :
1151
Lastpage :
1156
Abstract :
This paper contributes to the ongoing development of comprehensive execution semantics of IEC61499 by discussion and comparison of the semantics that could be achieved by alteration of postulates introduced in the Sequential Hypothesis, and by variation of different priority assignments during implementation.
Keywords :
IEC standards; formal specification; programming language semantics; IEC61499 formal execution semantics; sequential hypothesis; Computer architecture; Computer languages; Embedded software; Embedded system; Hardware; Job shop scheduling; Joining processes; Operating systems; Runtime; Software engineering;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industrial Informatics, 2007 5th IEEE International Conference on
Conference_Location :
Vienna
ISSN :
1935-4576
Print_ISBN :
978-1-4244-0851-1
Electronic_ISBN :
1935-4576
Type :
conf
DOI :
10.1109/INDIN.2007.4384938
Filename :
4384938
Link To Document :
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