Reliability of flip chip assemblies subjected to extreme low temperatures

Electronic assemblies are approximately "stress free" near their assembly temperature, which is typically above 150 degC when encapsulants and solders are involved. As the assemblies are cooled below room temperature, the temperature difference between ambient and "stress free" conditions becomes extremely high, and the thermal expansion mismatch induced stresses, strains, and deformations in the assembly can become very large. This phenomenon is exacerbated by the changes in material behavior that occur at extreme low temperatures present in proposed NASA lunar and Mars missions. In particular, encapsulants become much more stiff/brittle losing their typical nonlinear/inelastic stress-strain characteristics and high strains to failure, and the yield stresses for solders become very high. In this work, we evaluated the mechanical performance and reliability of flip chip on laminate assemblies subjected to extreme low temperatures. Stress measurements have been made in the flip chip assemblies during thermal cycling using stress test chips incorporating piezoresistive sensor rosettes. The (111) silicon test chips were 5 times 5 mm in size, with perimeter solder balls on a 200-micron pitch. The obtained stress measurement data correlated well with the predictions of nonlinear finite element models. A microtester has been used to characterize the stress-strain behavior of the solder, underfill encapsulant, and PCB from -180 to +150 C to aid in the numerical simulations