System size independent architecture for Jacobi processor

This paper presents a scalable hardware architecture for Jacobi processor which is the main component in a Jacobi solver. Multiple Jacobi processors can be easily cascaded to form a Jacobi solver for processing a large linear system since the architecture is independent of system size. The required hardware resources such as floating-point multipliers and subtractors are determined by the required parallel processing power. A linear system equation of eight variables is implemented using a Xilinx Virtex-5 FPGA and the performance of this implementation is also discussed.