Timing aware interconnect prediction models for FPGAS

A-priori interconnect prediction is the estimation of routing requirements of a design without even performing placement. All current a-priori models assume that the optimization objective during placement and routing is to minimize wirelength and congestion. However, design performance is a very important goal to all designers and interconnects requirements for a design that are optimized for timing have not been studied. We present an empirical methodology that takes c, a user defined input that trades off routability and timing, and estimate a-priori some important characteristics of the design. This tunable model will be very useful for design under uncertainties or preliminary feasibility study at system levels. We show how the length of source-sink pairs is important and how its distribution can be predicted. Our results show very accurate prediction for circuits that are placed and routed with VPR.