DocumentCode :
2138822
Title :
The locus of points of constant output VSWR around the load optimal impedance: Evaluation of power transistors robustness
Author :
Blanchet, Floria ; Bousbia, Hind ; Barataud, Denis ; Nebus, Jean-Michel ; Pache, Denis
Author_Institution :
STMicroelectronics, Crolles, France
fYear :
2006
fDate :
16-16 June 2006
Firstpage :
129
Lastpage :
132
Abstract :
This paper determines the locus of points of constant output voltage standing wave ratio (VSWR) around the load optimal impedance at the fundamental frequency. This resolution is very helpful to determine the power transistors robustness. To illustrate this, some measurements results are presented on a Si/SiGe HBT of STMicroelectronics technology. The measurements are realized on two multi-harmonic load-pull test-benches: one passive and one active.
Keywords :
Ge-Si alloys; electric impedance; heterojunction bipolar transistors; power transistors; HBT; STMicroelectronics technology; Si-SiGe; load optimal impedance; multiharmonic load-pull test-benches; power transistors robustness; voltage standing wave ratio; Frequency; Germanium silicon alloys; Impedance; Power transistors; Reflection; Robustness; Silicon germanium; Testing; Voltage; Writing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ARFTG Conference, 2006 67th
Conference_Location :
San Francisco, CA
Print_ISBN :
978-0-7803-9529-9
Type :
conf
DOI :
10.1109/ARFTG.2006.4734357
Filename :
4734357
Link To Document :
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