Programmable and reconfigurable hardware architectures for the rapid prototyping of cellular automata

In this paper we describe and compare several architectures of cellular automata to be used as hardware accelerators in the evaluation loop of a genetic algorithm. In addition, two dynamically reconfigurable cell interconnection networks are presented capable to realize nonregular lattices. Cellular automata are basic computational structures of interacting units which may expose self-organization and emergent behaviour. To investigate this behaviour subject to different cell interconnect patterns, an automated inspection flow is needed, including a very fast evaluation of single specimen. For that purpose, a flexible FPGA-based accelerator for cellular automata evaluation is used, which can be accessed transparently by a Java client running the genetic algorithm. Several architectures have been developed for that: a straightforward implementation of the cellular automaton, an area-reduced architecture, a dynamically reconfigurable interconnection network, which allows the interconnection of single cells under certain constraints and, finally, a dynamically reconfigurable interconnection network, which allows to connect cells arbitrarily.