Communication synthesis in a multiprocessor environment

At Leiden University, we are developing a design methodology that allows for fast mapping of nested-loop applications (e.g. DSP, imaging, or multimedia) written in a subset of Matlab onto reconfigurable devices. This design methodology is implemented into a tool chain that we call COM-PAAN/LAURA (Stefanov et al., 2004). This methodology generates a process network in which the inter-process communication takes place in a point-to-point fashion. Four types of point-to-point inter-processor communication exist in the PN. Two of them use a FIFO like communication and the other two use a cache like memory to exchange data. In this paper, we investigate the realizations for the four communication types and show that point-to-point communication at the level of scalars can be realized automatically and very efficiently in today´s FPGAs.