A new architecture of matched-filter bank for high-speed code acquisition of ZCZ-CDMA system

Author

Guo, Xiuoxu ; Chen, Jie ; Qui, Yulin ; Suehiro, Nuoki

Author_Institution

Microelectron. R&D Center, Chinese Acad. of Sci., Beijing, China

fYear

2003

fDate

27-29 Aug. 2003

Firstpage

391

Lastpage

395

Abstract

We propose a new architecture of matched-filter (MF) bank for the code acquisition of ZCZ-CDMA system. The ZCZ-CDMA system can accurately detect multipath properties and greatly improve data transmission efficiency by using the special properties of the zero correlation zones (ZCZ) sequence. As a traditional matched-filter bank is used to carry out the code acquisition and the despreading operations to realize the information transmission at 20Mbps in the ZCZ-CDMA system, the circuit scale is too large and the power consumption is too high. Using our proposed new matched-filter bank, the circuit scale and the power consumption is greatly reduced. The high-speed and lower power VLSI design of the new matched-filter bank is implemented on FPGA.

Keywords

code division multiple access; field programmable gate arrays; matched filters; multipath channels; FPGA; VLSI design; ZCZ-CDMA system; code division multiple access; code synchronization; field programmable gate arrays; high speed code acquisition; matched-filter bank; power consumption; zero correlation zone; Autocorrelation; Binary sequences; Circuits; Data communication; Energy consumption; Hardware; Matched filters; Multiaccess communication; Signal processing algorithms; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Parallel and Distributed Computing, Applications and Technologies, 2003. PDCAT'2003. Proceedings of the Fourth International Conference on

Print_ISBN

0-7803-7840-7

Type

conf

DOI

10.1109/PDCAT.2003.1236330

Filename

1236330