DocumentCode
2139685
Title
Generalizing square attack using side-channels of an AES implementation on an FPGA
Author
Carlier, Vincent ; Chabanne, Hervé ; Dottax, Emmanuelle ; Pelletier, Hervé
Author_Institution
Defense Securite, SAGEM, Paris, France
fYear
2005
fDate
24-26 Aug. 2005
Firstpage
433
Lastpage
437
Abstract
We show how to attack an implementation of AES on an FPGA where all bytes are processed in parallel. We introduce a new way of retrieving information, mixing algebraic properties and physical observations. The attack is based on a generalization of the Square Attack. We focus on the electromagnetic side-channel, but our results are still valid for power consumption analysis as they reflect a global phenomenon inside the chip; and so, this contrasts with situations where eavesdroppers take advantage of local electromagnetic emanations.
Keywords
cryptography; field programmable gate arrays; information retrieval; power consumption; security of data; AES implementation; FPGA; Square Attack; electromagnetic side-channel; field programmable gate arrays; information retrieval; local electromagnetic emanation; power consumption analysis; side channel attacks; Cryptography; Electromagnetic analysis; Energy consumption; Field programmable gate arrays; Information analysis; Information retrieval; Power supplies; Smart cards; Time measurement; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Logic and Applications, 2005. International Conference on
Print_ISBN
0-7803-9362-7
Type
conf
DOI
10.1109/FPL.2005.1515760
Filename
1515760
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