Design optimization for isolation in high wiring density packages with high speed SerDes links

This paper discusses design tradeoffs for high speed signal performance in buildup laminate packages with high wiring density. Trace design in die escaping area, PTH vias placement pattern and BGA I/O assignments are analyzed in depth for design optimization through numerous simulations as major areas of high coupling concern and channel performance. Then design suggestions are made at each area for performance and cost optimization and design strategies are developed to achieve the overall required performance as a whole system. Lastly some coupling test results on HSS links are presented to verify the performance of the design