Title :
Design optimization for isolation in high wiring density packages with high speed SerDes links
Author :
Na, Nanju ; Audet, Jean ; Shan, Lei ; Cranmer, Michael ; Lafontant, Gary ; Zwitter, Deborah
Author_Institution :
IBM Syst. & Technol. Group, Essex Junction, VT
Abstract :
This paper discusses design tradeoffs for high speed signal performance in buildup laminate packages with high wiring density. Trace design in die escaping area, PTH vias placement pattern and BGA I/O assignments are analyzed in depth for design optimization through numerous simulations as major areas of high coupling concern and channel performance. Then design suggestions are made at each area for performance and cost optimization and design strategies are developed to achieve the overall required performance as a whole system. Lastly some coupling test results on HSS links are presented to verify the performance of the design
Keywords :
ball grid arrays; integrated circuit design; integrated circuit interconnections; isolation technology; laminates; BGA I/O assignments; HSS links; cost optimization; coupling test; design optimization; high speed SerDes links; high wiring density packages; laminate packages; performance optimization; trace design; vias placement pattern; Analytical models; Cost function; Design optimization; Laminates; Packaging; Pattern analysis; Performance analysis; Signal design; Testing; Wiring;
Conference_Titel :
Electronic Components and Technology Conference, 2006. Proceedings. 56th
Conference_Location :
San Diego, CA
Print_ISBN :
1-4244-0152-6
DOI :
10.1109/ECTC.2006.1645646
