DocumentCode :
2139934
Title :
HAIL: a hardware-accelerated algorithm for language identification
Author :
Kastner, Charles M. ; Covington, G. Adam ; Levine, Andrew A. ; Lockwood, John W.
Author_Institution :
Appl. Res. Lab., Washington Univ. in St. Louis, MO, USA
fYear :
2005
fDate :
24-26 Aug. 2005
Firstpage :
499
Lastpage :
504
Abstract :
A hardware-accelerated algorithm has been designed to automatically identify the primary languages used in documents transferred over the Internet. The algorithm has been implemented in hardware on the field programmable port extender (FPX) platform. This system, referred to as the hardware-accelerated identification of languages (HAIL) project, identifies the primary languages used in content transferred over transmission control protocol (TCP)/Internet protocol (IP) networks that operate at rates exceeding 2.4 Gigabits/second. We demonstrate that this hardware accelerated circuit, operating on a Xilinx XCV2000E-8 FPGA, far outperforms software algorithms running on modern personal computers while maintaining extremely high levels of accuracy.
Keywords :
Internet; document handling; field programmable gate arrays; microprocessor chips; reconfigurable architectures; transport protocols; HAIL; Internet protocol networks; Xilinx XCV2000E-8 FPGA; documents transfer; field programmable port extender platform; hardware accelerated circuit; hardware implementation; hardware-accelerated identification of languages; primary language identification; software algorithms; transmission control protocol; Acceleration; Algorithm design and analysis; Automatic control; Circuits; Control systems; Hardware; IP networks; Internet; Protocols; TCPIP;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications, 2005. International Conference on
Print_ISBN :
0-7803-9362-7
Type :
conf
DOI :
10.1109/FPL.2005.1515771
Filename :
1515771
Link To Document :
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