Title :
A deep-submicrometer MOSFET model for analog/digital circuit simulations
Author :
Jeng, M. ; Ko, P.K. ; Hu, C.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
An accurate drain current model for deep-submicrometers MOSFETs down to the L/sub eff/=0.25 mu m for digital as well as analog applications has been developed. The model is based on the recently improved physical understanding of deep-submicron MOS devices. Care has been taken to retain the basic functional from fully physical models while improving model accuracy and computational efficiency. The ease of parameter extraction was also a major consideration. In addition to the effects commonly included in MOSFET current equation, the inversion-layer capacitance effect, hot-electron-induced output-resistance degradation, and source/drain parasitic resistance effect have been taken into account.<>
Keywords :
hot carriers; insulated gate field effect transistors; inversion layers; semiconductor device models; 0.25 micron; analog/digital circuit simulations; deep-submicrometer MOSFET; deep-submicron MOS devices; drain current model; hot-electron-induced output-resistance degradation; inversion-layer capacitance effect; parameter extraction; source/drain parasitic resistance effect; Circuit simulation; Computational efficiency; Computational modeling; Degradation; Digital circuits; Equations; MOS devices; MOSFET circuits; Parameter extraction; Parasitic capacitance;
Conference_Titel :
Electron Devices Meeting, 1988. IEDM '88. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/IEDM.1988.32766
