DocumentCode
2140222
Title
Flow control in Output Buffered Switch with Input Groups
Author
Olesinski, Wladek ; Eberle, Hans ; Gura, Nils ; Chrysos, Nikos
Author_Institution
Sun Microsyst. Labs., Menlo Park, CA
fYear
2008
fDate
15-17 May 2008
Firstpage
6
Lastpage
12
Abstract
We have recently proposed a novel architecture called Output Buffered Switch with Input Groups (OBIG) together with a scheduler called Parallel Wrapped Wave Front Arbiter with Fast Scheduler (PWWFA-FS) for building large, fast switches. In this paper we continue this work and tackle the issue of flow control. We show how on/off and credit flow control schemes can be applied in OBIG; we further introduce implicit flow control that does not use any explicit control information. Simulation results show how the proposed flow control schemes perform in our architecture.
Keywords
buffer circuits; digital integrated circuits; scheduling; switching circuits; credit flow control schemes; on-off flow control schemes; output buffered switch with input groups; parallel wrapped wave front arbiter with fast scheduler; Buildings; Communication switching; Communication system control; Computer architecture; Computer science; Laboratories; Processor scheduling; Sun; Switches; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Switching and Routing, 2008. HSPR 2008. International Conference on
Conference_Location
Shanghai
Print_ISBN
978-1-4244-1981-4
Electronic_ISBN
978-1-4244-1982-1
Type
conf
DOI
10.1109/HSPR.2008.4734413
Filename
4734413
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