Integration of a NOC-based multimedia processing platform

At Tampere University of Technology we are developing a multimedia processing platform using previously designed IP components. The utilized components include the Proteo network-on-chip, the coffee processor, the milk floating point coprocessor, and the transport triggered TACO for protocol processing. Unlike shared buses, networks-on-chip support varying levels of communication parallelism depending on the topology. This design case illustrates the need to match the network topology and the interfaces to the computation models. Characteristics of the platform prototype on FPGA are described together with our approach to enable efficient utilization of the communication resources through the bus-oriented standard interfaces used.