DocumentCode :
2140904
Title :
An integrated framework for architecture level exploration of reconfigurable platform
Author :
Siozios, K. ; Tatas, K. ; Koutroumpezis, G. ; Soudris, D. ; Thanailakis, A.
Author_Institution :
Dep. of Electr. & Comput. Eng., Democritus Univ. of Thrace, Xanthi, Greece
fYear :
2005
fDate :
24-26 Aug. 2005
Firstpage :
658
Lastpage :
661
Abstract :
In this paper, the EX-VPR tool, which used for architecture level exploration, is presented. This tool belongs to an integrated framework (MEANDER) for mapping applications into a fine-grain reconfigurable platform (FPGA). Having as input VHDL description of an application, the framework produces the appropriate configuration bitstream. The proposed tool framework supports a variety of FPGA architectures. Additionally, a novel power aware switch box is proposed. Quantitative comparisons with existing switch boxes are provided, yielding promising results.
Keywords :
field programmable gate arrays; logic design; reconfigurable architectures; EX-VPR tool; FPGA architectures; MEANDER; VHDL description; architecture level exploration; configuration bitstream; fine grain reconfigurable platform; power aware switch box; Application software; Application specific integrated circuits; Computer architecture; Field programmable gate arrays; Graphical user interfaces; Hardware design languages; Integrated circuit yield; Logic design; Open source software; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications, 2005. International Conference on
Print_ISBN :
0-7803-9362-7
Type :
conf
DOI :
10.1109/FPL.2005.1515807
Filename :
1515807
Link To Document :
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