3-D integrated inductor on silicon backend using compliant interconnect process for 10GHz low jitter VCO application

This paper presents a 3-D integrated coil inductor fabricated on silicon backend for 10GHz LC type (L for inductance, C for capacitance) voltage-controlled oscillator (VCO) for low jitter VCO applications , with improved quality factor (Q) of on-chip inductors. The 3-D inductor is formed using a compliant interconnect processing method used for flip chip technologies (Muthukumar, 2006). The compliant die-package interconnects are designed to have a very small inductance (100~200pH) to minimize the insertion loss for high-frequency signals (Braunisch, 2004). Using this compliant interconnect processing method a 3-D high Q coil inductor with inductance of 0.8~1.2nH for low jitter LC type VCO applications at 10GHz can be fabricated. At high frequencies, the higher the Q of the inductor, the lower is the jitter/phase noise of the LC VCO. A 2-D integrated inductor in a package substrate having Q higher than a 2-D on-chip inductor can also be used for 10GHz VCO application. However, the additional routing trace inductance resulting from the integrated inductor in package substrate may limit the implementation of LC-tank part of the VCO compared to a high Q 3-D coil inductor located on silicon backend. This paper presents the design of a 3-D coil for the 10GHz low jitter VCO application, the simulated performance of the 3-D coil and 2-D integrated inductors in package substrate using Ansoft HFSS, and a method to fabricate and integrate the 3-D coil on the silicon backend layers