Title :
Thermal stability of a high performance PTGVMOS with native-tie
Author :
Tsai, Ying-Chieh ; Lin, Jyi-Tsong ; Eng, Yi-Chuen ; Kang, Shiang-Shi ; Tseng, Yi-Ming ; Tseng, Hung-Jen ; Lin, Po-Hsieh
Author_Institution :
Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
Abstract :
We demonstrate thermal stability of PTGVMOS (Pseudo Tri-Gate Vertical MOSFET) with native-tie on bulk Si wafer. For comparison three types of structure are designed. According to 2D simulation, our proposed structure show excellent thermal stability, such as the lattice temperature in the drain-on-top configuration and drain-on-bottom configuration were improved 50% and 66.6% respectively. The fabricated devices have excellent on/off current ratio (61900,000 times at gate length 40 nm) in the drain-on-bottom configuration. In addition, the devices overcome short-channel effects and self heating effects significantly.
Keywords :
MOSFET; electric heating; thermal stability; 2D simulation; PTGVMOS; drain-on-bottom configuration; drain-on-top configuration; gate length; lattice temperature; native-tie; on-off current ratio; pseudotrigate vertical MOSFET; self heating effects; short-channel effects; thermal stability; Etching; Fabrication; Heating; Lattices; MOSFET circuits; Oxidation; Planarization; Plasma temperature; Thermal engineering; Thermal stability;
Conference_Titel :
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-2185-5
Electronic_ISBN :
978-1-4244-2186-2
DOI :
10.1109/ICSICT.2008.4734464
