• DocumentCode
    2141545
  • Title

    Leveraging reconfigurability in the design process

  • Author

    Shannon, Lesley

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
  • fYear
    2005
  • fDate
    24-26 Aug. 2005
  • Firstpage
    731
  • Lastpage
    732
  • Abstract
    We are investigating an on-chip design methodology for embedded computing systems implemented on FPGAs. The objective is to exploit the platform´s reconfigurability, such that system development can occur on the final implementation platform. This is comparable to the software development process where applications are typically designed on a workstation that is representative of the final product´s platform, not a simulator that models the processor. Designing on the target technology is also appealing for FPGA designs. An on-chip design methodology better leverages the main advantage of reconfigurability - the user may redesign the system while avoiding non-recurring costs, such as mask redesign costs. It also allows the user to quickly obtain real-time information about system performance.
  • Keywords
    embedded systems; field programmable gate arrays; logic design; reconfigurable architectures; FPGAs; embedded computing systems; on-chip design methodology; platform reconfigurability; real-time information; system development; Application software; Computational modeling; Costs; Design methodology; Embedded computing; Field programmable gate arrays; Process design; Programming; System-on-a-chip; Workstations;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications, 2005. International Conference on
  • Print_ISBN
    0-7803-9362-7
  • Type

    conf

  • DOI
    10.1109/FPL.2005.1515830
  • Filename
    1515830